Jitter and Spur Minimization in Fractional-N Digital Frequency Synthesizers
Modeling, Simulation, Analysis, and Design Methodologies
This book presents a rigorous and practically grounded treatment of jitter and spur minimization in fractional-N digital phase locked loops (DPLLs), addressing one of the most critical challenges in modern frequency synthesis.
Specificaties
| ISBN/EAN | 9783032271853 |
| Auteur | Xu Wang |
| Uitgever | Van Ditmar Boekenimport B.V. |
| Taal | Engels |
| Uitvoering | Gebonden in harde band |
| Pagina's | 246 |
| Lengte | |
| Breedte |